Development of an FPAG for efficient and fast FFT in OFDM of WiFi (802.11ax) and 5G MODEM Systems
Developing Radix 2 and Radix2^2 to perform efficiently and quickly translate FFT (Fast Fourier Transform) used for OFDM (Orthogonal Frequency Division Multiplexing) Channel Estimation of WiFi (802.11ax) MODEM system
It aims to Develop FPGA that can perform efficiently and quickly translate FFT (Fast Fourier Transform) used for OFDM (Orthogonal Frequency Division Multiplexing) Channel Estimation of WiFi (802.11ax) MODEM system.
In the case of FFT, the reference of this work, it was developed as SDx. Using SDx environments may result in hardware implementations that are not as optimized as those created using lower-level hardware description languages. This is because high-level languages offer less fine-grained control over the FPGA hardware, which can lead to less efficient resource utilization or suboptimal pipelining and parallelism.
It's important to note that the performance of an FPGA design depends on several factors, including the quality of the RTL code, synthesis and placement, and routing optimizations. While SDx-generated designs may not be as optimized as those created using hardware description languages.
It may be configured to perform all WiFi MODEM operations by combining MIMO and FPGA functioning as LDPC decoder.
converting a signal from the time domain to the frequency domain using FFT provides valuable insights into its frequency components and simplifies various signal processing tasks, making it a widely used technique in many applications.